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00045 #ifndef NDS_DMA_INCLUDE
00046 #define NDS_DMA_INCLUDE
00047
00048 #include "nds/ndstypes.h"
00049
00050 #define DMA0_SRC (*(vuint32*)0x040000B0)
00051 #define DMA0_DEST (*(vuint32*)0x040000B4)
00052 #define DMA0_CR (*(vuint32*)0x040000B8)
00053
00054 #define DMA1_SRC (*(vuint32*)0x040000BC)
00055 #define DMA1_DEST (*(vuint32*)0x040000C0)
00056 #define DMA1_CR (*(vuint32*)0x040000C4)
00057
00058 #define DMA2_SRC (*(vuint32*)0x040000C8)
00059 #define DMA2_DEST (*(vuint32*)0x040000CC)
00060 #define DMA2_CR (*(vuint32*)0x040000D0)
00061
00062 #define DMA3_SRC (*(vuint32*)0x040000D4)
00063 #define DMA3_DEST (*(vuint32*)0x040000D8)
00064 #define DMA3_CR (*(vuint32*)0x040000DC)
00065
00066
00067 #define DMA_SRC(n) (*(vuint32*)(0x040000B0+(n*12)))
00068 #define DMA_DEST(n) (*(vuint32*)(0x040000B4+(n*12)))
00069 #define DMA_CR(n) (*(vuint32*)(0x040000B8+(n*12)))
00070
00071 #ifdef ARM9
00072 #define DMA_FILL(n) (*(vuint32*)(0x040000E0+(n*4)))
00073 #endif
00074
00075
00076
00077 #define DMA_ENABLE BIT(31)
00078 #define DMA_BUSY BIT(31)
00079 #define DMA_IRQ_REQ BIT(30)
00080
00081 #define DMA_START_NOW 0
00082 #define DMA_START_CARD (5<<27)
00083
00084 #ifdef ARM7
00085 #define DMA_START_VBL BIT(27)
00086 #endif
00087
00088 #ifdef ARM9
00089 #define DMA_START_HBL BIT(28)
00090 #define DMA_START_VBL BIT(27)
00091 #define DMA_START_FIFO (7<<27)
00092 #define DMA_DISP_FIFO (4<<27)
00093 #endif
00094
00095 #define DMA_16_BIT 0
00096 #define DMA_32_BIT BIT(26)
00097
00098
00099 #define DMA_REPEAT BIT(25)
00100
00101 #define DMA_SRC_INC (0)
00102 #define DMA_SRC_DEC BIT(23)
00103 #define DMA_SRC_FIX BIT(24)
00104
00105 #define DMA_DST_INC (0)
00106 #define DMA_DST_DEC BIT(21)
00107 #define DMA_DST_FIX BIT(22)
00108 #define DMA_DST_RESET (3<<21)
00109
00110 #define DMA_COPY_WORDS (DMA_ENABLE | DMA_32_BIT | DMA_START_NOW)
00111 #define DMA_COPY_HALFWORDS (DMA_ENABLE | DMA_16_BIT | DMA_START_NOW)
00112 #define DMA_FIFO (DMA_ENABLE | DMA_32_BIT | DMA_DST_FIX | DMA_START_FIFO)
00113
00114 static inline
00122 void dmaCopyWords(uint8 channel, const void* src, void* dest, uint32 size) {
00123 DMA_SRC(channel) = (uint32)src;
00124 DMA_DEST(channel) = (uint32)dest;
00125 DMA_CR(channel) = DMA_COPY_WORDS | (size>>2);
00126 while(DMA_CR(channel) & DMA_BUSY);
00127 }
00128
00129 static inline
00137 void dmaCopyHalfWords(uint8 channel, const void* src, void* dest, uint32 size) {
00138 DMA_SRC(channel) = (uint32)src;
00139 DMA_DEST(channel) = (uint32)dest;
00140 DMA_CR(channel) = DMA_COPY_HALFWORDS | (size>>1);
00141 while(DMA_CR(channel) & DMA_BUSY);
00142 }
00143
00144 static inline
00151 void dmaCopy(const void * source, void * dest, uint32 size) {
00152 DMA_SRC(3) = (uint32)source;
00153 DMA_DEST(3) = (uint32)dest;
00154 DMA_CR(3) = DMA_COPY_HALFWORDS | (size>>1);
00155 while(DMA_CR(3) & DMA_BUSY);
00156 }
00157
00158 static inline
00167 void dmaCopyWordsAsynch(uint8 channel, const void* src, void* dest, uint32 size) {
00168 DMA_SRC(channel) = (uint32)src;
00169 DMA_DEST(channel) = (uint32)dest;
00170 DMA_CR(channel) = DMA_COPY_WORDS | (size>>2);
00171
00172 }
00173
00174 static inline
00183 void dmaCopyHalfWordsAsynch(uint8 channel, const void* src, void* dest, uint32 size) {
00184 DMA_SRC(channel) = (uint32)src;
00185 DMA_DEST(channel) = (uint32)dest;
00186 DMA_CR(channel) = DMA_COPY_HALFWORDS | (size>>1);
00187 }
00188
00189 static inline
00197 void dmaCopyAsynch(const void * source, void * dest, uint32 size) {
00198 DMA_SRC(3) = (uint32)source;
00199 DMA_DEST(3) = (uint32)dest;
00200 DMA_CR(3) = DMA_COPY_HALFWORDS | (size>>1);
00201 }
00202
00203 static inline
00211 void dmaFillWords( u32 value, void* dest, uint32 size) {
00212 #ifdef ARM7
00213 (*(vu32*)0x027FFE04) = (vu32) value;
00214 DMA_SRC(3) = 0x027FFE04;
00215 #else
00216 DMA_FILL(3) = (vuint32)value;
00217 DMA_SRC(3) = (uint32)&DMA_FILL(3);
00218 #endif
00219
00220 DMA_DEST(3) = (uint32)dest;
00221 DMA_CR(3) = DMA_SRC_FIX | DMA_COPY_WORDS | (size>>2);
00222 while(DMA_CR(3) & DMA_BUSY);
00223 }
00224
00225 static inline
00233 void dmaFillHalfWords( u16 value, void* dest, uint32 size) {
00234 #ifdef ARM7
00235 (*(vu32*)0x027FFE04) = (vu32) value;
00236 DMA_SRC(3) = 0x027FFE04;
00237 #else
00238 DMA_FILL(3) = (vuint32)value;
00239 DMA_SRC(3) = (uint32)&DMA_FILL(3);
00240 #endif
00241
00242 DMA_DEST(3) = (uint32)dest;
00243 DMA_CR(3) = DMA_SRC_FIX | DMA_COPY_HALFWORDS | (size>>1);
00244 while(DMA_CR(3) & DMA_BUSY);
00245 }
00246
00247 static inline
00253 int dmaBusy(uint8 channel) {
00254 return (DMA_CR(channel) & DMA_BUSY)>>31;
00255 }
00256
00257
00258 #endif
00259