Contains defines and macros for ARM7 and ARM9 timer operation. It also contains a simplified API for timer use including the ability to chain multiple callbacks to a single hardware timer. [詳細]
#include <nds/ndstypes.h>
#include <nds/linkedlist.h>
マクロ定義 | |
#define | TIMER_FREQ(n) (-0x2000000/(n)) |
A macro that calculates TIMER_DATA(n) settings for a given frequency of n. | |
#define | TIMER_FREQ_64(n) (-(0x2000000>>6)/(n)) |
A macro that calculates TIMER_DATA(n) settings for a given frequency of n. | |
#define | TIMER_FREQ_256(n) (-(0x2000000>>8)/(n)) |
A macro that calculates TIMER_DATA(n) settings for a given frequency of n. | |
#define | TIMER_FREQ_1024(n) (-(0x2000000>>10)/(n)) |
A macro that calculates TIMER_DATA(n) settings for a given frequency of n. | |
#define | TIMER0_DATA (*(vuint16*)0x04000100) |
Same as TIMER_DATA(0). | |
#define | TIMER1_DATA (*(vuint16*)0x04000104) |
Same as TIMER_DATA(1). | |
#define | TIMER2_DATA (*(vuint16*)0x04000108) |
Same as TIMER_DATA(2). | |
#define | TIMER3_DATA (*(vuint16*)0x0400010C) |
Same as TIMER_DATA(3). | |
#define | TIMER_DATA(n) (*(vuint16*)(0x04000100+((n)<<2))) |
Returns a dereferenced pointer to the data register for timer number "n". | |
#define | TIMER0_CR (*(vuint16*)0x04000102) |
Same as TIMER_CR(0). | |
#define | TIMER1_CR (*(vuint16*)0x04000106) |
Same as TIMER_CR(1). | |
#define | TIMER2_CR (*(vuint16*)0x0400010A) |
Same as TIMER_CR(2). | |
#define | TIMER3_CR (*(vuint16*)0x0400010E) |
Same as TIMER_CR(3). | |
#define | TIMER_CR(n) (*(vuint16*)(0x04000102+((n)<<2))) |
Returns a dereferenced pointer to the data register for timer control Register. | |
#define | TIMER_ENABLE (1<<7) |
Enables the timer. | |
#define | TIMER_IRQ_REQ (1<<6) |
Causes the timer to request an Interupt on overflow. | |
#define | TIMER_CASCADE (1<<2) |
When set will cause the timer to count when the timer below overflows (unavailable for timer 0). | |
#define | TIMER_DIV_1 (0) |
Causes the timer to count at 33.514Mhz. | |
#define | TIMER_DIV_64 (1) |
Causes the timer to count at (33.514 / 64) Mhz. | |
#define | TIMER_DIV_256 (2) |
Causes the timer to count at (33.514 / 256) Mhz. | |
#define | TIMER_DIV_1024 (3) |
Causes the timer to count at (33.514 / 1024)Mhz. | |
列挙型 | |
enum | ClockDivider { ClockDivider_1 = 0, ClockDivider_64 = 1, ClockDivider_256 = 2, ClockDivider_1024 = 3 } |
allowable timer clock dividers [詳細] | |
関数 | |
void | timerStart (int channel, ClockDivider divider, u16 ticks, fp callback) |
Creates a standard timer. Callback is tied directly to interupt table and called directly resulting in less latency than the attached timer. | |
u16 | timerElapsed (int channel) |
returns the ticks elapsed since the last call to timerElapsed() | |
void | cpuStartTiming (u32 timer) |
begins cpu Timing using two timers for 32bit resolution. | |
u32 | cpuEndTiming () |
ends cpu Timing |
Contains defines and macros for ARM7 and ARM9 timer operation. It also contains a simplified API for timer use including the ability to chain multiple callbacks to a single hardware timer.
The timers are fed with a 33.513982 MHz source on the ARM9 and ARM7
u32 cpuEndTiming | ( | ) |
ends cpu Timing
void cpuStartTiming | ( | u32 | timer | ) |
begins cpu Timing using two timers for 32bit resolution.
timer | The base hardware channel to use (0 - 2) |